Supervisory Circuit | ||||||||
Part No. | Features | VIN(Range)(V) | PGI to PGO | TDLY1 | Package | |||
3510 |
OVPx3 + UVPx2 + PGO + PSON + FPO * OVP/OVLO for 3.3V, 5V, VDD. * UVP/UVLO for 3.3V, 5V. * Open-drain Output for PGO and FPO pin. * 300ms PGO delay. * 75ms delay for 3.3V/5V SCP. * 2.3ms PSON control to FPO turn-off delay. * 38ms PSON control de-bounce. * 73us width OVP/UVP noise deglitches. |
4.0V~15.0V | VDD=5V | 200ms~450ms | DIP-8 SOP-8 | |||
3511 |
OVPx3 + UVPx2 + PGO + PDON_N + FPL_N * OVP/OVLO for 3.3V, 5V, VDD. * UVP/UVLO for 3.3V, 5V. * Open-drain Output for PGO and FPL_N. * 300ms PGO delay. * 75ms delay for 3.3V/5V SCP. * 2.4ms PDON_N control to FPL_N turn-off delay. * 38ms PDON_N control de-bounce. * 73us width OVP/UVP noise deglitches. |
3.8V~15.0V | VDD=5V | 200ms~490ms | DIP-8 SOP-8 | |||
3512* | PC Power Supply Supervisors OVPx4+OCPx3+UVP+PGO+Pson+FPO | 4.0V~15.0V | VDD=5V | 200ms~450ms | DIP-14 SOP-14 | |||
3513 |
OVPx4 + OCPx4 + UVPx4 + PGO + PSONB + FPOB + OTP * OVP/OVLO for 3.3V, 5V, 12V. * UVP/UVLO for 3.3V, 5V, 12V. * OCP monitors for 3.3V, 5V, 12V output current. * Open-drain Output for PGO and FPOB. * 300ms PGO delay. * 75ms(PGI>1.2V)/300ms(PGI<1.2V) delay for 3.3V, 5V, 12V SCP. * 2.4ms PSONB control to FPOB turn-off delay. * 38ms PSONB control de-bounce. * 73us width OVP/UVP noise deglitches. |
4.0V~15.0V | VDD=5V | 200ms~490ms | DIP-16 SOP-16 | |||
3520 |
OVPx4 + UVPx3 + PG + REM * Complete PWM Control and Protection Circuitry. * OVP/OVLO for 3.3V, 5V, 12V, PT. * UVP/UVLO for 3.3V, 5V, 12V. * Open-drain Output for PG. * Open-drain PWM Control Output for C1, C2. * 36ms REM Control de–bounce. * 280ms delay for 3.3V, 5V, 12V SCP. * 280ms PG delay. * Built-in Soft-start function. |
3.0V ~ 5.5V | VDD=5V | 150ms~350ms | DIP-16 | |||
3521 |
OVPx4 + UVPx3 + PG + REM * Complete PWM Control and Protection Circuitry. * OVP/OVLO for 3.3V, 5V, 12V, PT. * UVP/UVLO for 3.3V, 5V, 12V. * Open-drain Output for PG. * Open-drain PWM Control Output for C1, C2. * 36ms REM Control de-bounce. * 250ms delay for 3.3V, 5V, 12V SCP. * PG delay time, set by TPG external CAP. |
3.0V ~ 5.5V | VDD=5V | 100ms~500ms | DIP-16 | |||
3515A* | PC Power Supply Supervisors, OVPx4+OCPx3+UVP+PGO+Pson+FPO+OTP | 4.0V~15.0V | VDD=5V | 200ms~490ms | DIP-14 SOP-14 | |||
S3529* | PC Power Supply Supervisors OVPx4+OCPx3+UVP+PGO+Pson+FPO | 3.8V~16.0V | VDD=12V | 200ms~400ms | DIP-14 SOP-14 | |||
S3515 |
OVPx4 + OCPx3 + UVPx4 + PGO + PSON + FPO * OVP/OVLO for 3.3V, 5V, 12V, 12VB. * UVP/UVLO for 3.3V, 5V, 12V, 12VB. * OCP monitors for 3.3V, 5V, and 12V/12VB output current. * Open-drain Output for PGO and FPO. * 300ms PGO delay. * 75ms delay for 3.3V, 5V, 12V, 12VB SCP. * 2.8ms PSON control to FPO turn-off delay. * 38ms PSON control de-Bounce. * 73uS width OVP/UVP/OCP noise deglitches. |
4.0V~15.0V | VDD=12V | 200ms~450ms | DIP-14 SOP-14 | |||
S3525 |
OVPx4 + OCPx3 + UVPx4 + PGO + PSONB + FPOB * OVP/OVLO for 3.3V, 5V, 12VA, 12VB. * UVP/UVLO for 3.3V, 5V, 12VA, 12VB. * OCP monitors 3.3V, 5V, 12VA, 12VB output current. * Open-drain Output for PGO, FPOB. * 225ms PGO delay. * 75ms(PGI>1.2V)/300ms(PGI<1.2V) delay for 3.3V, 5V, 12VA, 12VB SCP. * 2.4ms PSONB control to FPOB turn-off delay. * 38ms PSONB control de-bounce. * 73us width OVP/UVP/OCP noise deglitches. |
4.0V~15.0V | VDD=5V | 200ms~490ms | DIP-14 SOP-14 | |||
S3527 |
OVPx5 + OCPx4 +UVPx4 + PGO + PSONB + FPOB * OVP/OVLO VX, 3.3V, 5V, 12VA, V12B. * UVP/UVLO 3.3V, 5V, 12VA and 12VB. * OCP monitors 3.3V, 5V, 12VA, 12VB output current. * Open-drain Output for PGO, FPOB. * 300ms PGO delay. * 75ms(PGI>12V)/600ms(PGI<12V) delay for SCP/OCP. * 4ms PSONB control to FPOB turn-off delay. * 38ms PSONB control de–bounce. * 14us width OVP noise deglitch. * 1ms width UVP noise deglitch. * 20ms width OCP noise deglitch. * 73us width PGI noise deglitch. |
3.8V~16.0V | VDD=5V | 200ms~400ms | DIP-16 SOP-16 |
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